Computationally secure Cryptographic algorithms, when implemented on physical hardware leak correlated physical signatures (e.g. power supply current, electromagnetic radiation, acoustic, thermal) which could be utilized to break the crypto-engine in linear time. While the existence of such side-channel attacks have been known for decades, the impact of them have been increasing with the proliferation of billions of IoT edge-devices with resource constraints. In this talk I will discuss some of our recent work on profiled attacks that take advantage of the advances in Deep Neural Networks to break AES in a few iterations. In the second half of the talk, I will describe some of the embedded hardware techniques that can provide resiliency against such power side channel attacks.